1. Field of the Invention
The invention relates to electrostatic discharge (ESD) protection devices, and in particular, to insulated gate bipolar transistor electrostatic discharge (IGBT-ESD) protection devices.
2. Description of the Related Art
Conventional high voltage electrostatic discharge (ESD) protection devices include lateral diffused metal oxide semiconductor (LDMOS) power transistors, metal oxide semiconductor field effect transistors (MOSFET), silicon control rectifiers (SCR), bipolar junction transistors (BJT), diodes and field oxide devices (FOD). For a device experiencing high voltage electrostatic discharge (ESD), an inner circuit may either be damaged or result in a latch-up effect due to an overly high trigger voltage and an overly low holding voltage. Therefore, by adding an additional driving circuit to the device, or by regulating layout parameters, trigger voltage can be reduced such that a holding voltage of the device can be higher than an operation voltage. Thus, resulting in high voltage electrostatic discharge (ESD) protection.
For conventional ultra-HV devices, a silicon-on-insulator (SOT) substrate and fabrication processes thereof are adopted to isolate individual devices, thereby eliminating parasitic effects between devices during high voltage operation. However, by using the silicon-on-insulator (SOT) substrate and fabrication processes thereof, heat dissipation ability of the ultra-HV devices may be diminished. Thus, an effective solution for dissipating heat generated by ESD protection devices has long been pursued. Meanwhile, during fabrication of high-voltage devices, the diffused concentration of well doped regions is quite low, such that relative impedance increases, therefore, diminishing the ability for the ESD protection devices to be uniformly turned on.